synopsys DWC3 CORE

DWC3- USB3 CONTROLLER

Required properties:
 - compatible: must be "synopsys,dwc3"
 - reg : Address and length of the register set for the device
 - interrupts: Interrupts used by the dwc3 controller.
 - usb-phy : array of phandle for the PHY device
 - interrupt-names : Required interrupt resource entries are:
	"irq" : Interrupt for DWC3 core
	"otg_irq" : Interrupt for DWC3 core's OTG Events

Optional properties:
 - tx-fifo-resize: determines if the FIFO *has* to be reallocated.
 - snps,host-only-mode: if present then dwc3 should be run in HOST only mode.
 - snps,nominal-elastic-buffer: When set, the nominal elastic buffer setting
	is used. By default, the half-full setting is used.
 - snps,core-reset-after-phy-init: If present, PHY reset and initialization is
   performed before core reset.
 - snps,ssphy-clear-auto-suspend-on-disconnect: If present, clear auto suspend feaure with ssusb phy
   during cable disconnect.
 - snps,usb3-u1u2-disable: If present, disable u1u2 low power modes for DWC3 core controller in SS mode.
 - snps,hird_thresh: If present, will determine the value of DCTL[HIRD_Thresh] which, in turn,
	controls the UTMI sleep mechanism vs. the PHY. Default value is 12.
 - snps,bus-suspend-enable: If present then controller supports low power mode
	during bus suspend.

This is usually a subnode to DWC3 glue to which it is connected.

dwc3@4a030000 {
	compatible = "synopsys,dwc3";
	reg = <0x4a030000 0xcfff>;
	interrupts = <0 92 4>, <0 179 0>;
	interrupt-names = "irq", "otg_irq";
	usb-phy = <&usb2_phy>, <&usb3,phy>;
	tx-fifo-resize;
	snps,hsphy-auto-suspend-disable;
};
