TSPP2 - Transport Stream Packet Processor v2

TSPP2 is a HW accelerator for processing MPEG-2 Transport Stream packets.
For information on the TSPP2 driver, please refer to the TSPP2 driver
documentation: Documentation/arm/msm/tspp2.txt.

The devicetree representation of the TSPP2 block should be:

Required properties:

- compatible: "qcom,msm_tspp2"
- cell-index: represents device ID.
- reg: physical memory base addresses and sizes for the following:
	TSPP2, TSIF0, TSIF1, TSPP2_BAM.
- reg-names: names of the memory regions:
	MSM_TSPP2, MSM_TSIF0, MSM_TSIF1, MSM_TSPP2_BAM.
- interrupts: represents IRQ numbers for the following:
	TSIF_TSPP2, TSIF0, TSIF1, TSIF_BAM.
- interrupt-names: TSPP2, TSIF and BAM interrupt names.
- vdd-supply: power regulator (GDSC) supplying power to the broadcast subsystem.
Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt"
for more information on the following four properties:
- qcom,msm-bus,name: String representing the client name ("tspp2").
- qcom,msm-bus,num-cases: 3 cases - no bandwidth, minimal bandwidth for register
	access, and maximum bandwidth required for full operation.
- qcom,msm-bus,num-paths
- qcom,msm-bus,vectors-KBps: represents the bandwidths required for the above
	usecases.
- qcom,iommu-hlos-group: Name of the Broadcast HLOS IOMMU domain as defined in
	<target>-iommu-domains.dtsi.
	The Broadcast HLOS IOMMU domain includes a context bank and virtual
	address pools definitions, used for mapping non-secured pipe memory
	buffers.
- qcom,iommu-hlos-partition: Partition number in the HLOS IOMMU domain.
- qcom,iommu-cpz-group: Name of the Broadcast CPZ IOMMU domain as defined in
	<target>-iommu-domains.dtsi.
	The Broadcast CPZ IOMMU domain includes a context bank and virtual
	address pool definitions, used for mapping secured pipe memory buffers.
- qcom,iommu-cpz-partition: Partition number in the CPZ IOMMU domain.

Example:

	tspp2: msm_tspp2@fc724000 {
		compatible = "qcom,msm_tspp2";
		cell-index = <0>;
		reg = <0xfc724000 0x7000>, /* MSM_TSPP2  */
		      <0xfc72b000 0x0200>, /* MSM_TSIF0 */
		      <0xfc72b200 0x0200>, /* MSM_TSIF1 */
		      <0xfc704000 0x20000>; /* MSM_TSPP2_BAM */
		reg-names = "MSM_TSPP2",
			"MSM_TSIF0",
			"MSM_TSIF1",
			"MSM_TSPP2_BAM";
		interrupts = <0 297 0>, /* TSPP2 */
			<0 295 0>, /* TSIF0 */
			<0 296 0>, /* TSIF1 */
			<0 294 0>; /* TSIF_BAM */
		interrupt-names = "TSPP2",
			"TSIF0",
			"TSIF1",
			"TSPP2_BAM";
		vdd-supply = <&gdsc_bcss>;
		qcom,msm-bus,name = "tspp2";
		qcom,msm-bus,num-cases = <3>;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps =
				<96 512 0 0>, /* No vote */
				<96 512 1024 1024>, /* Register access only. 8Mbps should be more than enough */
				<96 512 24576 61440>; /* Max. bandwidth required is 480Mbps */
		qcom,iommu-hlos-group = "bcast_hlos";
		qcom,iommu-hlos-partition = <0>;
		qcom,iommu-cpz-group = "bcast_cpz";
		qcom,iommu-cpz-partition = <0>;
	};


