MSM SoC HSUSB controllers

OTG:

Required properties :
- compatible : should be "qcom,hsusb-otg"
- regs : offset and length of the register set in the memory map
- interrupts: IRQ line
- interrupt-names: OTG interrupt name(s) referenced in interrupts above
            HSUSB OTG expects "core_irq" which is IRQ line from CORE and
            optional ones are described in next section.
- qcom,hsusb-otg-phy-type: PHY type can be one of
            1 - Chipidea 45nm PHY
	    2 - Synopsis 28nm PHY
- qcom,hsusb-otg-mode: Operational mode. Can be one of
            1 - Peripheral only mode
	    2 - Host only mode
	    3 - OTG mode
	    Based on the mode, OTG driver registers platform devices for
	    gadget and host.
- qcom,hsusb-otg-otg-control: OTG control (VBUS and ID notifications)
  can be one of
            1 - PHY control
	    2 - PMIC control
	    3 - User control (via debugfs)
- <supply-name>-supply: handle to the regulator device tree node
         Required "supply-name" is "HSUSB_VDDCX" (when voting for VDDCX) or
         "hsusb_vdd_dig" (when voting for VDDCX Corner voltage),
         "HSUSB_1p8-supply" and "HSUSB_3p3-supply".
- qcom,vdd-voltage-level: This property must be a list of three integer
	values (no, min, max) where each value represents either a voltage
	in microvolts or a value corresponding to voltage corner.

Optional properties :
- reg : offset and length of the TCSR register for routing USB Controller
	signals to either picoPHY0 or picoPHY1.
- interrupt-names : Optional interrupt resource entries are:
    "async_irq" : Interrupt from HSPHY for asynchronous wakeup events in LPM.
    "pmic_id_irq" : Interrupt from PMIC for external ID pin notification.
- qcom,hsusb-otg-disable-reset: If present then core is RESET only during
	    init, otherwise core is RESET for every cable disconnect as well
- qcom,hsusb-otg-pnoc-errata-fix: If present then workaround for PNOC
	    performance issue is applied which requires changing the mem-type
	    attribute via VMIDMT.
- qcom,hsusb-otg-default-mode: The default USB mode after boot-up.
  Applicable only when OTG is controlled by user. Can be one of
            0 - None. Low power mode
            1 - Peripheral
	    2 - Host
- qcom,hsusb-otg-phy-init-seq: PHY configuration sequence. val, reg pairs
  terminate with -1
- qcom,hsusb-otg-power-budget: VBUS power budget in mA
  0 will be treated as 500mA
- qcom,hsusb-otg-pclk-src-name: The source of pclk
- Refer to "Documentation/devicetree/bindings/arm/msm/msm-bus.txt" for
  below optional properties:
    - qcom,msm-bus,name
    - qcom,msm-bus,num_cases - There are three valid cases for this: NONE, MAX
		and MIN bandwidth votes. Minimum two cases must be defined for
		both NONE and MAX votes. If MIN vote is different from NONE VOTE
		then specify third case for MIN VOTE.
		then specify third case for MIN VOTE. If explicit NOC clock rates
		are not specified then MAX value should be large enough to get
		desired BUS frequencies. In case explicit NOC clock rates are
		specified, peripheral mode bus bandwidth vote should be defined
		to vote for arbitrated bandwidth so that 60MHz frequency is met.

    - qcom,msm-bus,num_paths
    - qcom,msm-bus,vectors
- qcom,hsusb-otg-lpm-on-dev-suspend: If present then USB enter to
	    low power mode upon receiving bus suspend.
- qcom,hsusb-otg-clk-always-on-workaround: If present then USB core clocks
	    remain active upon receiving bus suspend and USB cable is connected.
	    Used for allowing USB to respond for remote wakup.
- qcom,hsusb-otg-delay-lpm: If present then USB core will wait one second
	after disconnect before entering low power mode.
- qcom,hsusb-otg-delay-lpm-hndshk-on-disconnect: If present then USB core will
	wait for the handshake with the IPA to complete before entering low
	power mode.
- <supply-name>-supply: handle to the regulator device tree node.
         Optional "supply-name" is "vbus_otg" to supply vbus in host mode.
- qcom,dp-manual-pullup: If present, vbus is not routed to USB controller/phy
	and controller driver therefore enables pull-up explicitly before
	starting controller using usbcmd run/stop bit.
- qcom,usb2-enable-hsphy2: If present then USB2 controller is connected to 2nd
	HSPHY.
- qcom,hsusb-log2-itc: value of 2^(log2_itc-1) will be used as the
	interrupt threshold (ITC), when log2_itc is between 1 to 7.
- qcom,hsusb-l1-supported: If present, the device supports l1 (Link power
	management).
- qcom,no-selective-suspend: If present selective suspend is disabled on hub ports.
- qcom,hsusb-otg-mpm-dpsehv-int: If present, indicates mpm interrupt to be
	configured for detection of dp line transition during VDD minimization.
- qcom,hsusb-otg-mpm-dmsehv-int: If present, indicates mpm interrupt to be
	configured for detection of dm line transition during VDD minimization.
- pinctrl-names : This should be defined if a target uses gpio and pinctrl framework.
  See "pinctrl" in Documentation/devicetree/bindings/pinctrl/msm-pinctrl.txt.
  It should specify the names of the configs that pinctrl can install in driver
	Following are the pinctrl config that can be installed
	"hsusb_active" : Active configuration of pins, this should specify active
	config of vddmin gpio (if used) defined in their pin groups.
	"hsusb_sleep" : Disabled configuration of pins, this should specify sleep
	config of vddmin gpio (if used) defined in their pin groups.
- qcom,hsusb-otg-vddmin-gpio = If present, indicates a gpio that will be used
	to supply voltage to the D+ line during VDD minimization and peripheral
	bus suspend. If not exists, then VDD minimization will not be allowed
	during peripheral bus suspend.
- qcom,hsusb-otg-rw-during-lpm-workaround: If present, indicates that remote-
	wakeup during USB low-power mode SW workaround will be applied. When
	this workaround is applied, the PHCD and the FPR bits are written
	to the PORTSC register in the same register write operation.
- qcom,ahb-async-bridge-bypass: If present, indicates that enable AHB2AHB By Pass
	mode with device controller for better throughput. With this mode, USB Core
	runs using PNOC clock and synchronous to it. Hence it is must to have proper
	"qcom,msm-bus,vectors" to have high bus frequency. User shouldn't try to
	enable this feature without proper bus voting.
- qcom,disable-retention-with-vdd-min: If present don't allow phy retention but allow
	vdd min.
- qcom,usbin-vadc: Corresponding vadc device's phandle to read usbin voltage using VADC.
	This will be used to get value of usb power supply's VOLTAGE_NOW property.
- qcom,usbid-gpio: This corresponds to gpio which is used for USB ID detection.
- qcom,bus-clk-rate: If present, indicates nominal bus frequency to be voted for
	bimc/snoc/pcnoc clock with usb cable connected. If AHB2AHB bypass is enabled,
	pcnoc value should be defined to very large number so that PNOC runs at max
	frequency.

Example HSUSB OTG controller device node :
	usb@f9690000 {
		compatible = "qcom,hsusb-otg";
		reg = <0xf9690000 0x400>;
		interrupts = <134>;
		interrupt-names = "core_irq";

		qcom,hsusb-otg-phy-type = <2>;
		qcom,hsusb-otg-mode = <1>;
		qcom,hsusb-otg-otg-control = <1>;
		qcom,hsusb-otg-disable-reset;
		qcom,hsusb-otg-pnoc-errata-fix;
		qcom,hsusb-otg-default-mode = <2>;
		qcom,hsusb-otg-phy-init-seq = <0x01 0x90 0xffffffff>;
		qcom,hsusb-otg-power-budget = <500>;
		qcom,hsusb-otg-pclk-src-name = "dfab_usb_clk";
		qcom,hsusb-otg-lpm-on-dev-suspend;
		qcom,hsusb-otg-clk-always-on-workaround;
		hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
                HSUSB_1p8-supply = <&pm8226_l10>;
                HSUSB_3p3-supply = <&pm8226_l20>;
		qcom,vdd-voltage-level = <1 5 7>;
		qcom,dp-manual-pullup;
		qcom,hsusb-otg-mpm-dpsehv-int = <49>;
		qcom,hsusb-otg-mpm-dmsehv-int = <58>;
		qcom,msm-bus,name = "usb2";
		qcom,msm-bus,num_cases = <2>;
		qcom,msm-bus,num_paths = <1>;
		qcom,msm-bus,vectors =
				<87 512 0 0>,
				<87 512 60000000 960000000>;
		pinctrl-names = "hsusb_active","hsusb_sleep";
		pinctrl-0 = <&vddmin_act>;
		pinctrl-0 = <&vddmin_sus>;
		qcom,hsusb-otg-vddmin-gpio = <&pm8019_mpps 6 0>;
		qcom,hsusb-otg-rw-during-lpm-workaround = <1>;
		qcom,disable-retention-with-vdd-min;
		qcom,usbin-vadc = <&pm8226_vadc>;
		qcom,usbid-gpio = <&msm_gpio 110 0>;
	};

MSM HSUSB EHCI controller

Required properties :
- compatible : should be "qcom,ehci-host"
- reg : offset and length of the register set in the memory map
- interrupts: IRQ lines used by this controller
- interrupt-names : Required interrupt resource entries are:
            HSUSB EHCI expects "core_irq" and optionally "async_irq".
- <supply-name>-supply: handle to the regulator device tree node
  Required "supply-name" is either "hsusb_vdd_dig" or "HSUSB_VDDCX"
  "HSUSB_1p8-supply" "HSUSB_3p3-supply".
- qcom,usb2-power-budget: maximum vbus power (in mA) that can be provided.
- qcom,vdd-voltage-level: This property must be a list of five integer
  values (no, 0.5vsuspend, 0.75suspend, min, max) where each value respresents
  either a voltage in microvolts or a value corresponding to voltage corner.
  First value represents value to vote when USB is not at all active, second
  value represents value to vote when target is not connected to dock during low
  power mode, third value represents vlaue to vote when target is connected to dock
  and no peripheral connected over dock during low power mode, fourth value represents
  minimum value to vote when USB is operational, fifth item represents maximum value
  to vote for USB is operational.

Optional properties :
- qcom,usb2-enable-hsphy2: If present, select second PHY for USB operation.
- pinctrl-names : This should be defined if a target uses pinctrl framework.
  See "pinctrl" in Documentation/devicetree/bindings/pinctrl/msm-pinctrl.txt.
  It should specify the names of the configs that pinctrl can install in driver
  Following are the pinctrl configs that can be installed
	"ehci_active" : Active configuration of pins, this should specify active
	config defined in pin groups of used gpio's from resume and
	ext-hub-reset.
	"ehci_sleep" : Disabled configuration of pins, this should specify sleep
	config defined in pin groups of used gpio's from resume and
	ext-hub-reset.
- qcom,resume-gpio: if present then peripheral connected to usb controller
  cannot wakeup from XO shutdown using in-band usb bus resume. Use resume
  gpio to wakeup peripheral.
- qcom,ext-hub-reset-gpio: If present then an external HUB is connected to
  the USB host controller and its RESET_N signal is connected to this
  ext-hub-reset-gpio GPIO. It should be driven LOW to RESET the HUB.
- qcom,usb2-enable-uicc: If present, usb2 port will be used for uicc card connection.

Example MSM HSUSB EHCI controller device node :
	ehci: qcom,ehci-host@f9a55000 {
		compatible = "qcom,ehci-host";
		reg = <0xf9a55000 0x400>;
		interrupts = <0 134 0>, <0 140 0>;
		interrupt-names = "core_irq", "async_irq";
		/* If pinctrl is used and ext-hub-reset and resume gpio's are present*/
		pinctrl-names = "ehci_active","ehci_sleep";
		pinctrl-0 = <&ehci_reset_act &resume_act>;
		pinctrl-1 = <&ehci_reset_sus &resume_sus>;
		qcom,resume-gpio = <&msm_gpio 80 0>;
		qcom,ext-hub-reset-gpio = <&msm_gpio 0 0>;
		hsusb_vdd_dig-supply = <&pm8841_s2_corner>;
		HSUSB_1p8-supply = <&pm8941_l6>;
		HSUSB_3p3-supply = <&pm8941_l24>;
		qcom,usb2-enable-hsphy2;
		qcom,usb2-power-budget = <500>;
		qcom,vdd-voltage-level = <1 2 3 5 7>;
		qcom,usb2-enable-uicc;
	};

ANDROID USB:

Required properties:
- compatible: should be "qcom,android-usb"

Optional properties :
- reg  : offset and length of memory region that is used by device to
  update USB PID and serial numbers used by bootloader in DLOAD mode.
- qcom,android-usb-swfi-latency : value to be used by device to vote
  for DMA latency in microsecs.
- qcom,streaming-func : add list of usb function name. If mention usb function
  is being enable as part of USB composition, streaming mode is enable with
  usb device controller to get better throughput. NOTE: Inverted CRC and
  turnaround timeout is observed on enabling streaming. Hence it is required
  to see these errors and number of erros on enabling this at USB level to make
  final decision to enable this feature or not.
- qcom,android-usb-cdrom : if this property is present then device creates
  a new LUN as CD-ROM.
- qcom,android-usb-uicc-nluns : Number of mass storage LUNs (8 bits) required
  for the UICC card.
Example Android USB device node :
	android_usb@fc42b0c8 {
		compatible = "qcom,android-usb";
		reg = <0xfc42b0c8 0xc8>;
		qcom,android-usb-swfi-latency = <1>;
		qcom,streaming-func = "rndis","mtp";
		qcom,android-usb-uicc-nluns = /bits/ 8 <1>;
	};
